#!/bin/sh
#
# Program the FPGA and load drivers

RUNNINGAPPSDIR=/ross/app/bin
RUNNINGAPPSDIRCONFIGPATH=/ross/etc/runningAppsPath

if [ -f "$RUNNINGAPPSDIRCONFIGPATH" ]; then
        RADPATH=$(cat $RUNNINGAPPSDIRCONFIGPATH)
        if [ -d "$RADPATH" ]; then
                RUNNINGAPPSDIR=$RADPATH
        fi
fi
MV="$RUNNINGAPPSDIR"/mv_control

start() {
	echo "Loading Zynq FPGA :start `cut -f1 -d. /proc/uptime` seconds"

	source /tmp/eeprom

	#Set Direction Pin 7 Output
	devmem 0xE000A204 32 0x00000080
	#Set Output Enable Pin 7
	devmem 0xE000A208 32 0x00000080
	#Write Data Pin 7 = High
	devmem 0xE000A000 32 0xFF7F0080

	ZYNQ_BIT=bonza.bit
	cat /ross/driver/$ZYNQ_BIT >/dev/xdevcfg

	# Check to see if the bit file loaded successfully.
	# Access to FPGA will hang if the bit image is not loaded.
	DONE=`cat /sys/devices/soc0/amba/f8007000.devcfg/prog_done`
	if test "$DONE" = "1" ; then

		# Reduce ns fan speed 60%
		devmem 0x8aa00800 32 0x999999
		devmem 0x8aa00204 32 0x999999

		# Take gmii2rgmii converter out of reset
		if [ "$PRODUCT" == "Ultrix" ]; then
			devmem 0x8aa00004 32 0x00000000
			devmem 0x8aa0001c 32 0x00000000
		fi


	fi
}

stop() {
	# NOTE: on successful testing of process script shutdowns this can
	# be removed - currently kill and wait to allow completion
	killall5 -9
	sleep 0.5
	# ensure FPGAs are reconfigured/  rebooted
	$MV --iocard-reboot-all

}

restart() {
	stop
	start
}

case "$1" in
	start)
		start
		;;
	stop)
		stop
		;;
	restart|reload)
		restart
		;;
	*)
		echo "Usage: $0 {start|stop|restart}"
		exit 1
		;;
esac

exit $?
