[0]transaction_cnt =(13453)
[0]cmd_q_oflw      =(0)
[0]cmd_q_uflw      =(0)
[0]rtn_q_oflw      =(0)
[0]rtn_q_uflw      =(0)
[0]rtn_shrt        =(0)
[0]aur_down        =(0)
[0]aur_fail        =(0)
[0]rtn_mis         =(0)
[0]msg_err         =(0)
[0]cmd_data        =(0)
[0]zynq_to_fpga1   =(0)
[0]fpga1_to_fpga2  =(0)
[0]fpga2_to_fpga1  =(0)
[0]fpga1_to_zynq   =(0)
[0]shrt            =(0)
[0]fpga_absent     =(0)
[0]rq_pops         =(0)
[0]rq_pope         =(0)
[1]transaction_cnt =(5216)
[1]cmd_q_oflw      =(0)
[1]cmd_q_uflw      =(0)
[1]rtn_q_oflw      =(0)
[1]rtn_q_uflw      =(0)
[1]rtn_shrt        =(0)
[1]aur_down        =(0)
[1]aur_fail        =(0)
[1]rtn_mis         =(0)
[1]msg_err         =(0)
[1]cmd_data        =(0)
[1]zynq_to_fpga1   =(0)
[1]fpga1_to_fpga2  =(0)
[1]fpga2_to_fpga1  =(0)
[1]fpga1_to_zynq   =(0)
[1]shrt            =(0)
[1]fpga_absent     =(0)
[1]rq_pops         =(1)
[1]rq_pope         =(0)
[3]transaction_cnt =(6093)
[3]cmd_q_oflw      =(0)
[3]cmd_q_uflw      =(0)
[3]rtn_q_oflw      =(0)
[3]rtn_q_uflw      =(0)
[3]rtn_shrt        =(0)
[3]aur_down        =(0)
[3]aur_fail        =(0)
[3]rtn_mis         =(0)
[3]msg_err         =(0)
[3]cmd_data        =(0)
[3]zynq_to_fpga1   =(0)
[3]fpga1_to_fpga2  =(0)
[3]fpga2_to_fpga1  =(0)
[3]fpga1_to_zynq   =(0)
[3]shrt            =(0)
[3]fpga_absent     =(0)
[3]rq_pops         =(0)
[3]rq_pope         =(0)
[4]transaction_cnt =(6101)
[4]cmd_q_oflw      =(0)
[4]cmd_q_uflw      =(0)
[4]rtn_q_oflw      =(0)
[4]rtn_q_uflw      =(0)
[4]rtn_shrt        =(0)
[4]aur_down        =(0)
[4]aur_fail        =(0)
[4]rtn_mis         =(0)
[4]msg_err         =(0)
[4]cmd_data        =(0)
[4]zynq_to_fpga1   =(0)
[4]fpga1_to_fpga2  =(0)
[4]fpga2_to_fpga1  =(0)
[4]fpga1_to_zynq   =(0)
[4]shrt            =(0)
[4]fpga_absent     =(0)
[4]rq_pops         =(0)
[4]rq_pope         =(0)
